MOUNTAIN VIEW, Calif. -- July 27, 2009 – Synfora, Inc., the premier provider of algorithmic synthesis tools for integrated circuit and system designers of large, complex processing applications, today announced that it has joined the Synopsys System-Level Catalyst Program, which is intended to accelerate the adoption of system-level design and verification tools and methodologies. In joining the program, Synfora will be ideally positioned to extend its PICO platform to support the increasingly large system-level market within a wider, collaborative environment.
“Our goal is to provide proven productivity on the largest production designs, not just on small blocks, using the highest level abstraction and QOR that is competitive with manual design,” said Synfora CTO Vinod Kathail. “Participation in the System-Level Catalyst Program will enable us to ensure interoperability of our PICO family with the other tools and methodologies used in creating system-level designs. We strongly support such industry standardization efforts, since they will help our customers realize significant overall design and verification productivity improvements.
"We welcome Synfora in the Synopsys System-Level Catalyst Program, which continues to grow as the industry demand for higher levels of abstraction increases," said Frank Schirrmeister, product marketing director for the Solutions Group at Synopsys. "The need for interoperability is clear from the multitude of models, tools and methodologies users are facing when adopting system design methodologies. Based on standards driven by IEEE, OSCI and the SPIRIT Consortium, the System-Level Catalyst program increases designer productivity significantly."
About the Synopsys System-Level Catalyst Program
The Synopsys System-Level Catalyst Program provides members access to Synopsys system-level tools and IP, enabling the development and support of program members' respective system-level tools, models, training and services. Open to electronic design automation (EDA) vendors, intellectual property (IP) vendors, embedded software companies and service providers, the program is designed to benefit mutual customers by advancing tool and model interoperability as well as availability of system-level models and services. For more information please go to http://www.synopsys.com/slcatalyst.
About the Synfora PICO Platform
The PICO Algorithmic Synthesis Platform provides productivity gains by creating application accelerators from an untimed C algorithm at the highest level of abstraction. PICO yields QoR (quality of results) that is competitive with manual design by using a unique parallelizing compiler and multi-level hierarchical abstraction and IP reuse. It offers the highest possible level abstraction for large designs, and has been proven to provide huge productivity gains on the largest production designs, not just on small blocks.
Synfora, Inc. is the premier provider of algorithmic synthesis tools used to design complex systems-on-chips (SoCs) and FPGAs. Synfora's PICO algorithmic synthesis platform offers designers of large, complex subsystems productivity gains at the highest-level design abstraction and delivers high QoR.
Synfora serves customers worldwide in the audio, video, imaging, wireless, and security segments of the integrated circuit (IC) design market. The company's investors are ATA Ventures, Foundation Capital, U.S. Venture Partners, Wafra, and Xilinx. For the latest information on Synfora, please visit http://www.synfora.com.
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PR for Synfora – Cayenne Communication LLC
Michelle Clancy, 252-940-0981, Email Contact