Logic Design for Array-Based Circuits

by Donnamaie E. White

Copyright © 1996, 2001, 2002 Donnamaie E. White


Design Submission

Last Edit September 2, 2001

  • Design Validation Review (required)

    A complete and comprehensive design validation review is required for all design submissions and is prompted for by AMCCSUBMIT.

    In cases where there is no software support for design rules, the designer must perform the validation checks manually and submit the results.

  • I/O List (required)

    The list of all signal I/O, added power and ground pads and fixed power and ground pads including signal I/O type (TTL standard, TTL open-collector, TTL 3-state, ECL 10K, ECL 100K, etc.) and clear identification of simultaneously switching outputs is generated by AMCCERC and called AMCCIO.LST. It must be included in the hardcopy and media documentation.

  • Annotation Level

    Space is provided on the submission checklist for annotation level, either Front-Annotation or Back-Annotation. Back-Annotation submissions are currently handled as special cases.

  • Maximum Operating Frequency

    The specified maximum operating frequency is the frequency at which the At-Speed simulation must be run; specify it in MHz or GHz.

  • Power

    The total power in Watts is to be computed or estimated. This includes DC power and any AC power, following the directions in Volume I, Section 5 of the design manual specific to the AMCC array series.

    Specify any differences between the total power entered here and the power computed by AMCCERC. The difference may be the AC power computation, different termination loading or duty cycles.

  • Annotation and Output Loading (required)

    AMCCANN output.dly

    AMCCANN allows the package type, package pin capacitance and system loading to be specified for the circuit. Commentary information on frequency must be added for high-speed I/O (see Section 4). The list of all signals with pad placement (if known), package pin capacitance (Front-Annotation or Back-Annotation), and system load is called AMCCPKG.LST. It must be included in the hardcopy and media documentation.

    The output.dly data file generated by AMCCANN must be included on media.

    The output capacitive load delays are included in the annotation files and is reflected in the simulation results. The delay files used in the simulations must be submitted on media. For Front-Annotation these are: FNTxxx[x].yyy, where xxx[x] is the simulation type (mil, com, min, nom,c5mx, c5mn, etc.) and yyy is the extension denoting the system used (dsy, val, men, ver, lsr, etc.). Back-Annotation uses BCKxxx[x].yyy. Refer to Volume I, Section 3 for a detailed list of the files used with a particular array series.

  • Cross Reference (optional)

    The AMCC cross-reference file, AMCCXREF.LST can be submitted on media. It is currently not required.

  • Function Description of the Circuit (optional)

    AMCC prefers that a high-level functional description of the circuit on the array be included in the hardcopy documentation. This description should include the required performance of the circuit, any timing constraints, interface requirements, testing specifications and the operating environment.

  • Block Diagram of the Circuit ..(optional)

    Unless a hierarchical schematic capture has been performed, AMCC prefers that a top-level block diagram of the circuit as configured for the array be included in the hardcopy documentation. If a hierarchical schematic capture has been performed, the top-level schematic may be sufficient.

  • Preplacement Requests (optional)

    Preplacement of macros for critical timing requirements can be submitted to AMCC if the designer feels it to be necessary. All preplacement requests will be evaluated by AMCC, and the designer will be notified if they can or cannot be met.

  • Pin-Out Requests (optional)

    I/O placement may be of concern in a design, and the designer may wish to specify a pin-out request to AMCC. The final pin-out is driven by layout considerations and restrictions. The pin-out requests will be evaluated by AMCC, and the designer will be notified if they can or cannot be met.

  • Critical Path and Timing Requirements (required)

    The maximum required frequency of operation for the circuit and the expected performance for the critical paths should be clearly stated in the hardcopy documentation following the procedure discussed in "Vector Submission Rules and Guidelines" in the AMCC design manual. Use the Timing Correlation report form for any path not covered by an AC Test.

  • Waivers - Approved PARS

    Attach any preapproval requests that have been approved to the design submission package and list them by number on page 6-A-2. These include custom macros, design rule variations, approved AMCCERC errors, approved timing check errors, and approved AMCCVRC errors.

Copyright @ 2001, 2002 Donnamaie E. White, White Enterprises
For problems or questions on these pages, contact dew@Donnamaie.com