7.5  Altera MAX 9000

Figure 7.9 shows the Altera MAX 9000 interconnect architecture. The size of the MAX 9000 LAB arrays varies between 4 ¥ 5 (rows ¥ columns) for the EPM9320 and 7 ¥ 5 for the EPM9560. The MAX 9000 is an extremely coarse-grained architecture, typical of complex PLDs, but the LABs themselves have a finer structure. Sometimes we say that complex PLDs with arrays (LABs in the Altera MAX family) that are themselves arrays (of macrocells) have a dual-grain architecture .

FIGURE 7.9  The Altera MAX 9000 interconnect scheme. (a)  A 4 ¥ 5 array of Logic Array Blocks (LABs), the same size as the EMP9400 chip. (b) A simplified block diagram of the interconnect architecture showing the connection of the FastTrack buses to a LAB.


In Figure 7.9 (b), boxes A, B, and C represent the interconnection between the FastTrack buses and the 16 macrocells in each LAB:

  • Box A connects a macrocell to one row channel.
  • Box B connects three column channels to two row channels.
  • Box C connects a macrocell to three column channels.

Chapter start ] [ Previous page ] [ Next page ]

© 2022 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise